/*
 * Copyright (c) 2009, Manish Shakya,Real Time Solutions Pvt. Ltd.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the Institute nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *
 */
/**
*
*	\file  spi0.c
*	\author Manish Shakya 
*	\brief
*	\date  Tuesday,October 27,2009
*	\version 1.0
*
*
*/
#include "peripherals.h"

#ifdef __SPI0__

#define ABRT 3
#define MODF 4 
#define ROVR 5  //Read overrun. When 1, this bit indicates that a read overrun has occurred. This bit is cleared by reading this register.
#define WCOL 6 // Write collision. When 1, this bit indicates that a write collision has occurred. This bit is cleared by reading this register, then accessing the SPI data register.
#define SPIF 7 

#if SPI_INTERRUPT_ENABLE == 1
/***********************************************************************************************************************/

	extern void spi_isr(uint32_t ch);
	void __spi_isr() __irq
	{
		 if(S0SPSR & (1<<SPIF))
		 {
		 	uint32_t in = S0SPDR;
			spi_isr(in);
		 }
		S0SPINT =1;
		CLR_VECTADDR();
	}

#else

/***********************************************************************************************************************/
	uint32_t 
	spi0_txrx(uint32_t out)
	{
	    uint32_t in;
	    
		S0SPDR = out;
		while( !(S0SPSR & (1<<SPIF)) ) ;
		in = S0SPDR;
	    return in;
	}
#endif 

/***********************************************************************************************************************/
void 
spi0_init(void)
{
	#ifndef	 SPI0_CONTROL
		#error "Please define SPIO_CONTROL in app-config.h"
	#endif

	#ifndef SPI0_CLOCK
		#error "Please define SPIO_CLOCK in app-config.h"
	#endif

	S0SPCR=SPI0_CONTROL;
	S0SPCCR=SPI0_CLOCK;
	PINSEL0 = PINSEL0 | (1<<8|1<<10|1<<12);

	#ifdef SPI_INTERRUPT_ENABLE 
		irq_install(SPI0_INT,__spi_isr);		
	#endif
}
#endif
